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Computer Architecture Lab/SS2013

Group 1 : sMIPSEdit

Name 1 : Dimitrios Larisis s124574
Name 2 : Vui Haw Chong s120981
Name 3 : Alvaro Duart s121592


Instruction Set I
Instruction Set II

Group 2 : ExMIPS Simulator in C#Edit

Name 1: Maciej Nowicki s124807

Instruction Set 1

Instruction Set 2

Group 3 MIPS Processor (BraveMIPS)Edit

Name : Bogdan I. Sorlea s121075

Assignment 1: Comparison of Different Microprocessors

Assignment 2: Instruction Set Architecture

BraveMIPS on GitHub

TODO list:

  • ASSEMBLER: add/fix parser file syntax, compile, integrate with lexer and obtain output use simple Java String manipulation [NOTE: came to a standstill with the implementation, cannot continue]
  • PERIPHERALS: integrate UART and Monopulse Generator (Debouncer)
  • TEST: write test bench in ISim, do also live test(s)
  • ISA: actually implement the MUL and DIV ALU operations
  • VALIDATION: check project completion with prof.
  • DOCUMENTATION/REPORT: to write

Group 4 - A Jop inspired stack machineEdit

Name 1 : Ioannis Kotleas s122576
Name 2 : Chatzigeorgakidis Georgios s121078
Name 3 : Dean Roy Humphreys s120971


Instruction Set I
Instruction Set II
FPGA Design Flow

Group 5 NoCEdit

Name 1 : Nis Jørgen Lange Schmit s042478
Name 2 : Mathias Herlev s103060