Computer Architecture Lab/WS2006

Project page for the course in winter 2006. Results of 6 real working processors can be found here.

RISE (Rarest Instruction Set Ever)Edit

Urban Stadler Harald Trinkl Jakob Lechner Christian Walter

Our discussion about three processor architectures can be found here. We have choosen to evaluate the following processors with respect to their intstruction set

Our discussion workplace where whe are working on our draft for our CPU.


Marcus Jeitler Josef Mosser Hermann Frühwirth Stephan Ramberger

What's MatPRO?Edit

MatPRO is a pipelined CoProzessor that handels 4x4 Matrix-Operations like addition or multiplication. It's equipped with a SimpCom-Interface to ensure an easy transport connection to existing SoC-Solutions.

Discussion about three processor architecturesEdit

Our discussion about three processor architectures is done. Stop by to see what´s it about!

SISP (Spartanic Instruction Set Processor)Edit

Thomas Polzer, Philipp Jahn, Thomas Flanitzer

Architecture ReviewEdit

We have chosen the following three architectures:

  • Intel 8bit micro processor platform (Representative: 8088)
  • Atmel Atmega 8bit micro controller family (Representative: Atmega128)
  • Motorola 68k family (Representative: 68008)

Our discussion about those three processor can be found here.

Instruction Set and Processor detailsEdit

Details about our planned processor as well as the instruction set definition can be viewed here.


The following tools have been developed for our processor:


Sample assembler files can be found here.

iMISC (invertable Minimized Instruction Set Computer)Edit

Michael Pöttschacher Maximilian Rosenblattl Andreas Wolf

We have choosen to compare the following architectures by their instruction sets

See Details here.

Details about iMISC

marca - McAdam's RISC Computer ArchitectureEdit

Roland Kammerer Wolfgang Puffitsch Kenan Bilic

For our comparison of three microprocessors go here.

The VHDL sources, the assembler and the documentation are available here. Reversing a line works fine in hardware, feel free to try out other programs.


Oliver Hoeftberger Simon Pirker Bernhard Weirich Yilin Huang

Our three examples of RISC ISA are the following:

You might be interested in the our NORISK Processor Design. The VHDL codes, Assembler and Instruction Set Simulator are here.

Group 6Edit

Ljatifi & Arfan

The examples

Here is our instruction set.