Computer Architecture Lab/Winter2006/JeitMossFrühRamb/Files
| Computer Architecture Lab/Winter2006/JeitMossFrühRamb/Files is outdated.
You can help by updating it if possible.
our Design consists of two parts:
- SimpCom for MatPro
The whole Design can be downloaded here
For better readability and for better understanding, we have split up the MatPRO in more sub parts:
- Globals: Package with constants
- IFetch: handels the IRAM and translates the program into smaller instructions
- IDecode: handels the DRAM and the Register-File
- ALU: as the name states, does the work
The Globals.vhd is a package that contains our constants.
The IFetch_v2.vhd controls the program flow. It takes the instruction of a program and, if needed, translates it into more smaller instructions that our ALU understands.
The IDecode.vhd takes the "generated" instruction from the IFetch and decides, if a value-transfer from DRAM to the Register-File or the other way around takes place. If such a value-transfer happens, it can also stall the whole CoProzessor, since we only use a dualported Register-File-RAM and no triported Register-File-RAM.
The alu.vhd simply does the maths. It takes 5 cycles until the result is valid: 3 cycles for the multiplication, 1 cycle for the addition/subtraction and 1 cycle for data normalisation.
SimpCom for MatPROEdit
Since we wanted to build a multi-purpose CoProzessor, we didn't implement the SimpCom direct into the MatPRO. Therefore, the SimpCom is a stand-alone Module that instantiates the MatPRO.
sc_matpro.vhd is the sourcefile for this Module.
A demo-assembler-program can be found here
The java-file for the JOP-Processor is this one