The necessities in Digital Design
Number Systems
editBinary Representation
Binary Arithmetic
Interfacing Digital and Analog Signals
- Sampling and Quantization (A.pdf)
- Digital-to-Analog Conversion (A.pdf)
- Analog-to-Digital Conversion (A.pdf)
C Program Examples
- Helpful Wikipedia Pages (C.pdf)
- Floating Point Representations (5A.pdf)
Combinational Circuits
editAnalysis
Components
- Decoder (B1.pdf)
- Encoder (B2.pdf)
- Multiplexer (B3.pdf)
- Adder (B4.pdf, fa.sch.pdf, adder4.sch.pdf)
Sequential Circuits
editAnalysis
- Metastability (A4.pdf)
- Flip-flop Timing (A5.pdf)
- SR Latch Forbidden State (A6.pdf)
- The Classic FF Design (A7.pdf)
- The Modern FF Design (A8.pdf)
Components
- Latches and Flip-flops (B1.pdf)
- Registers (B2.pdf, register.pdf)
- Counters (B3.pdf)
Array Devices
editMemory Arrays
- ROM
Logic Arrays
- PLA
- PAL
- PLD
- FPGA
- FPGA Structure
- FPGA Configuration (B.pdf)
Synchronous SRAM Timing
Asynchronous SRAM Timing
DRAM Timing
RTL Design Techniques
edit
Design Methodology
Synthesis
Logic Families and IOs
edit- BJT Based
- DTL (Diode-Transistor Logic)
- TTL (Transistor-Transistor Logic)
- ECL (Emitter-Coupled Logic)
- MOS Based
- CMOS (Complementary MOS)
- Pseudo-nMOS
- Transmission Gate
- BiCMOS (Bipolr + CMOS)
- Dynamic CMOS
- Domino
- Clocked-CMOS (C2MOS)
- Modern I/O Standards
- TTL and LVTTL (Low Voltage TTL)
- CMOS and LVCMOS (Low Voltage CMOS)
- SSTL (Stub Series Terminated Logic)
- HSTL (High Speed Tranceiver Logic)
- LVDS (Low Voltage Differential Signaling)
- Wikipedia Pages for Logic Families (A.pdf)
See also
<The necessities in Computer Design>
<The necessities in Computer Architecture>
<The necessities in Computer Organization>
Old
editUntil 2011.12 Chapter 1. Binary Numbers
- 1.1 Binary Numbers(pdf)
Minterm, Maxterm, HW
- 1.1 Lecture01(pdf)
Overflow HW
- Overflow Table(pdf)
K-Map
- K-Map(pdf)
Binary Adder
BCD to Ex3 Code Coversion, Dont' Care
- BCD to Ex3 Code Conversion (pdf)
Prime Implicant, Dont' Care
- Prime Implicant, Don't Care (pdf)
- HW 3.6 - explain the method of combining 0's and X's
Multiplexer / Demultiplexer
- Multiplexer (pdf)
- HW (TBD)
Flip Flop / Latch
- FF & Latch (pdf)
- FF & Latch HW (pdf)
- Gated D Latch & Master-Slave D FlipFlop (pdf)
- HW (Forbidden state and Indeterminate state) (pdf) (note in #2, S' R' instead of S R)
- Classical Edge Triggered D FlipFlop (pdf)
- HW (addition in SW and HW) (pdf)
- FSM1 (pdf)
- FSM2 (pdf)
- HW (FSM Waveforms) (pdf)
Counter
- Sychronous Counter (pdf)
- Ripple Counter, Multiplexer, Tri-state buffer(pdf)
- Register (pdf)
- Timing (pdf)
- HW (Multiplexer, Shift Register) (pdf)
- Universal Shift Register, Memory Cell (pdf)
- HW (Bit Serial Adder) (pdf)
Memory
- Memory (pdf)
Comparator, Multiplier
Multiplexer based design method
midterm result (pdf)
Until 2013.07
Number Systems
- Helpful Wikipedia Pages (pdf)
Combinational Circuits
- Truth Tables and Boolean Functions (2A.pdf)
- K-Map (2B.pdf)
- Binary Addition in C (2.C.pdf)
- Binary Arithmetic (2.D.pdf)
- Boolean Algebra (2.E.pdf)
Sequential Circuits
- Latches and Flip-flops (3A.pdf)
- FSM (Finite State Machine) (3B.pdf)
- SR Latch Forbidden State (3C.pdf)
- Flip-flop Timing (3D.pdf)
- Metastability (3E.pdf)
See also
"The necessities in Computer Design"
"The necessities in Computer Architecture"