This lesson covers Random Access Memory (RAM).
Objectives and Skills Edit
Objectives and skills for the RAM portion of CompTIA A+ certification include:
- Compare and contrast various RAM types and their features.
- Parity vs. non-parity
- ECC vs. non-ECC
- RAM configurations
- Single channel vs. dual channel vs. triple channel
- Single sided vs. double sided
- Buffered vs. unbuffered
- RAM compatibility
- YouTube: An Overview of PC Memory Types - CompTIA A+ 220-901: 1.3
- YouTube: Understanding PC Memory - CompTIA A+ 220-901: 1.3
- YouTube: RAM Upgrade Guide - What You Need to Know
- [ https://youtu.be/ZpsJ5bFAWAM YouTube: DDR4 RAM: Introduction to the latest DRAM Memory Technology]
Lesson Summary Edit
- A random-access memory (RAM) device allows data items to be accessed (read or written) in almost the same amount of time irrespective of the physical location of data inside the memory. In contrast, with direct-access data storage media such as hard disks or CD-RWs, the time required to read and write data items varies significantly depending on their physical locations on the recording medium, due to mechanical limitations such as media rotation speeds and arm movement.
- RAM is normally associated with volatile types of memory (such as Dynamic RAM memory modules), where stored information is lost if power is removed. Other types of non-volatile memory exist that allow random access for read operations, but either do not allow write operations or have limitations on them. These include most types of ROM.
- DRAM is widely used in digital electronics where low-cost and high-capacity memory is required. One of the largest applications for DRAM is the main memory (colloquially called the "RAM") in modern computers; and as the main memories of components used in these computers such as graphics cards (where the "main memory" is called the graphics memory). In contrast, SRAM, which is faster and more expensive than DRAM, is typically used where speed is of greater concern than cost, such as the cache memories in processors.
- A computer bus operating with double data rate (DDR) transfers data on both the rising and falling edges of the clock signal. DDR should not be confused with dual channel, in which each memory channel accesses two RAM modules simultaneously. The two technologies are independent of each other and many motherboards use both, by using DDR memory in a dual channel configuration. Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals.
- A DIMM or dual in-line memory module comprises a series of dynamic random-access memory integrated circuits. These modules are mounted on a printed circuit board and designed for use in personal computers, workstations and servers. DIMMs began to replace SIMMs (single in-line memory modules) as the predominant type of memory module as Intel P5-based Pentium processors began to gain market share. While the contacts on SIMMs on both sides are redundant, DIMMs have separate electrical contacts on each side of the module. Another difference is that standard SIMMs have a 32-bit data path, while standard DIMMs have a 64-bit data path.
- RAM parity checking is the storing of a redundant parity bit representing the parity (odd or even) of a small amount of computer data (typically one byte) stored in random access memory, and the subsequent comparison of the stored and the computed parity to detect whether a data error has occurred. Simple go/no go parity checking requires that the memory have extra, redundant bits beyond those needed to store the data; but if extra bits are available, they can be used to correct, as well as detect, errors.
- RAM with ECC or Error Correction Code can detect and correct errors. As with parity RAM, additional information needs to be stored and more processing needs to be done, making ECC RAM more expensive and a little slower than non-parity and logic parity RAM. This type of ECC memory is especially useful for any application where uptime is a concern: failing bits in a memory word are detected and corrected on the fly with no impact to the application. The occurrence of the error is typically logged by the operating system for analysis by a technical resource. In the case where the error is persistent, server downtime can be scheduled to replace the failing memory unit. This mechanism of detection and correction is known as EEC or Extended Error Correction.
- Registered, or buffered, memory is not the same as ECC; these strategies perform different functions. It is usual for memory used in servers to be both registered, to allow many memory modules to be used without electrical problems, and ECC, for data integrity. Memory used in desktop computers is neither, for economy. However, unbuffered (not-registered) ECC memory is available, and some non-server motherboards support ECC functionality of such modules when used with a CPU that supports ECC. Registered memory does not work reliably in motherboards without buffering circuitry, and vice versa.
- Multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically this multiplies the data rate by exactly the number of channels present. Modern high-end processors like the Intel i7 Extreme series and various Xeons support quad-channel memory.
- Dual-channel-enabled memory controllers in a PC system architecture utilize two 64-bit data channels. Dual channel should not be confused with double data rate (DDR), in which data exchange happens twice per DRAM clock. The two technologies are independent of each other and many motherboards use both, by using DDR memory in a dual-channel configuration. Dual-channel architecture requires a dual-channel-capable motherboard and two or more DDR, DDR2 SDRAM, or DDR3 SDRAM memory modules. The memory modules are installed into matching banks, which are usually color-coded on the motherboard. These separate channels allow the memory controller access to each memory module. It is not required that identical modules be used (if motherboard supports it), but this is often recommended for best dual-channel operation. Modules rated at different speeds can be run in dual-channel mode, although the motherboard will then run all memory modules at the speed of the slowest module. Some motherboards, however, have compatibility issues with certain brands or models of memory when attempting to use them in dual-channel mode. For this reason, it is generally advised to use identical pairs of memory modules, which is why most memory manufacturers now sell "kits" of matched-pair DIMMs. Several motherboard manufacturers only support configurations where a "matched pair" of modules are used. Theoretically, dual-channel configurations double the memory bandwidth when compared to single-channel configurations.
- DDR3 triple-channel architecture is used in the Intel Core i7-900 series. When operating in triple-channel mode, memory latency is reduced due to interleaving, meaning that each module is accessed sequentially for smaller bits of data rather than completely filling up one module before accessing the next one. Data is spread amongst the modules in an alternating pattern, potentially tripling available memory bandwidth for the same amount of data, as opposed to storing it all on one module. The architecture can only be used when all three, or a multiple of three, memory modules are identical in capacity and speed, and are placed in three-channel slots. When two memory modules are installed, the architecture will operate in dual-channel architecture mode.
Key Terms Edit
- CompTIA: A+ Certification Exam Objectives - Exam 220-901
- Wikipedia: Random-access memory
- Wikipedia: Random-access memory
- Wikipedia: Dynamic random-access memory
- Wikipedia:Double data rate
- Wikipedia:DDR SDRAM
- Wikipedia: DIMM
- Wikipedia: RAM parity
- Wikipedia: RAM parity#ECC type RAM
- Wikipedia: ECC memory#Registered memory
- Wikipedia: Multi-channel memory architecture
- Wikipedia: Multi-channel memory architecture#Dual-channel architecture
- Wikipedia: Multi-channel memory architecture#Triple-channel architecture