UTPA STEM/CBI Courses/Digital Systems

Course Title: Digital systems

Lecture Topic: Introduction to digital system design

Instructor: Weidong Kuang

Institution: University of Texas -- Pan American

Backwards Design edit

Course Objectives

  • Primary Objectives- By the next class period students will be able to:
    • Understand the basic concepts of logic circuits.
  • Sub Objectives- The objectives will require that students be able to:
    • Understand Boolean algebra, minterms, maxterms, logic gates, synthesis
    • Design CMOS logic gates using PMOS and NMOS transistors
  • Difficulties- Students may have difficulty:
    • Mastering the difference between minterms and maxterms
    • Grasping CMOS logic gates
  • Real-World Contexts- There are many ways that students can use this material in the real-world, such as:
    • Any small logic design project

Model of Knowledge

  • Concept Map
    • Variables and Functions
    • Boolean algebra
    • Minterms and Maxterms
    • Logic gates
    • Synthesis
    • CMOS logic gates at transistor level
  • Content Priorities
    • Enduring Understanding
      • The difference between Boolean function and regular function
      • The difference between Minterms and Maxterms
      • Complement property of CMOS logic gate
    • Important to Do and Know
      • Draw K-map
      • Minimize logic function based on K-map
      • Construct CMOS logic gate
    • Worth Being Familiar with
      • Boolean algegra properties

Assessment of Learning

  • Formative Assessment
    • In Class (groups)
      • There will be no group assignments.
    • Homework (individual)
      • Design logic functions at transistor level using CMOS
  • Summative Assessment
    • Quiz
    • Include one problem related to CMOS gate construction in mid-term exam.

Legacy Cycle edit

OBJECTIVE

By the next class period, students will be able to:

  • Obtain minimum-cost logic function from K-map
  • Design CMOS complex logic gates

The objectives will require that students be able to:

  • Obtain minimum-cost logic function from K-map
  • Design CMOS complex logic gates

THE CHALLENGE

CMOS logic gates at transistor level

GENERATE IDEAS

Pull down network and pull up network

MULTIPLE PERSPECTIVES

View transistors as switches

RESEARCH & REVISE

Read some research papers

TEST YOUR METTLE

Quiz and midterm exam

GO PUBLIC

Discussion between students

Pre-Lesson Quiz edit

  1. Boolean equation x+1=x (True or False)
  2. Boolean equation x+x.y=x (True or False)
  3. How many K-maps are required to represent a 5-varible logic function?

Test Your Mettle Quiz edit

  1. create CMOS complex gate for f=NOT(xy+z)