Materials Science and Engineering/Diagrams/Device Fabrication Processes
Schematic of MBE growth systemEdit
Any evaporation system includes a vacuum pump. It also includes an energy source that evaporates the material to be deposited. Many different energy sources exist:
- In the thermal method, the source material is placed in a crucible, which is radiatively heated by an electric filament. Alternatively, the source material may be hung from the filament itself (filament evaporation).
- Molecular beam epitaxy is an advanced form of thermal evaporation.
- In the electron-beam method, the source is heated by an electron beam with an energy up to 15 keV. See Electron beam evaporation.
- In flash evaporation, a fine wire of source material is fed continuously onto a hot ceramic bar, and evaporates on contact.
- Resistive evaporation is accomplished by passing a large current through a wire or foil of the material that is to be deposited.
Some systems mount the substrate on an out-of-plane planetary mechanism. The mechanism rotates the substrate simultaneously around two axes, to reduce shadowing.
- Heat shielding
- Mass spectrometer
- Ionization gauge
- Electron gun
- Quartz-crystal thickness monitor
- Hot plate
- View port
- Mechanical shutter
- Sb effusion cell
Design, process, and control parameterEdit
- Hearth design
- film thickness
- impurity concentration
- defect density
Traveling from source to substrateEdit
- Evaporant flux at substrate
- Background gas flux at substrate
- Mean free path
- Evaporant travels at line of sight
Ion implantation is a materials engineering process by which ions of a material can be implanted into another solid, thereby changing the physical properties of the solid. Ion implantation is used in semiconductor device fabrication and in metal finishing, as well as various applications in materials science research. The ions introduce both a chemical change in the target, in that they can be a different element than the target, and a structural change, in that the crystal structure of the target can be damaged or even destroyed.
Ion implantation equipment typically consists of an ion source, where ions of the desired element are produced, an accelerator, where the ions are electrostatically accelerated to a high energy, and a target chamber, where the ions impinge on a target, which is the material to be implanted. Each ion is typically a single atom, and thus the actual amount of material implanted in the target is the integral over time of the ion current. This amount is called the dose. The currents supplied by implanters are typically small (microamperes), and thus the dose which can be implanted in a reasonable amount of time is small. Thus, ion implantation finds application in cases where the amount of chemical change required is small.
Typical ion energies are in the range of 10 to 500 keV (1,600 to 80,000 aJ). Energies in the range 1 to 10 keV (160 to 1,600 aJ) can be used, but result in a penetration of only a few nanometers or less. Energies lower than this result in very little damage to the target, and fall under the designation ion beam deposition. Higher energies can also be used: accelerators capable of 5 MeV (800,000 aJ) are common. However, there is often great structural damage to the target, and because the depth distribution is broad, the net composition change at any point in the target will be small.
Atomic Layer DepositionEdit
Atomic Layer Deposition (ALD) is a gas phase chemical process used to create extremely thin coatings. The majority of ALD reactions use two chemicals, typically called precursors. These precursors react with a surface one-at-a-time in a sequential manner. By exposing the precursors to the growth surface repeatedly, a thin film is deposited.
ALD is a self-limiting, sequential surface chemistry that deposits conformal thin-films of materials onto substrates of varying compositions. ALD is similar in chemistry to chemical vapor deposition (CVD), except that the ALD reaction breaks the CVD reaction into two half-reactions, keeping the precursor materials separate during the reaction. ALD film growth is self-limited and based on surface reactions, which makes achieving atomic scale deposition control possible. By keeping the precursors separate throughout the coating process, atomic layer control of film grown can be obtained as fine as ~ 0.1 angstroms per monolayer.
ALD has unique advantages over other thin film deposition techniques, as ALD grown films are conformal, pin-hole free, and chemically bonded to the substrate. With ALD it is possible to deposit coatings perfectly uniform in thickness inside deep trenches, porous media and around particles. The film thickness range is usually 1-500 nm.
ALD can be used to deposit several types of thin films, including various ceramics, from conductors to insulators.
Reactive ion etching (RIE) is an etching technology used in microfabrication. It uses chemically reactive plasma to remove material deposited on wafers. The plasma is generated under low pressure (vacuum) by an electromagnetic field. High-energy ions from the plasma attack the wafer surface and react with it.
A typical (parallel plate) RIE system consists of a cylindrical vacuum chamber, with a wafer platter situated in the bottom portion of the chamber. The wafer platter, which is usually grounded, is electrically isolated from the rest of the chamber. Gas enters through small inlets in the top of the chamber, and exits to the vacuum pump system through the bottom. The types and amount of gas used vary depending upon the etch process; for instance, sulfur hexafluoride is commonly used for etching silicon. Gas pressure is typically maintained in a range between a few millitorr and a few hundred millitorr by adjusting gas flow rates and/or adjusting an exhaust orifice.
Other types of RIE systems exist, including inductively coupled plasma (ICP) RIE. In this type of system, the plasma is generated with an RF powered magnetic field. Very high plasma densities can be achieved, though etch profiles tend to be more isotropic.
A combination of parallel plate and inductively coupled plasma RIE is possible. In this system, the ICP is employed as a high density source of ions which increases the etch rate, whereas a separate RF bias is applied to the substrate (silicon wafer) to create directional electric fields near the substrate to achieve more anisotropic etch profiles.
Deep Reactive Ion EtchingEdit
A special subclass of RIE which continues to grow rapidly in popularity is deep RIE (DRIE). In this process, etch depths of hundreds of micrometres can be achieved with almost vertical sidewalls. The primary technology is based on the so-called "Bosch process", named after the German company Robert Bosch which filed the original patent, where two different gas compositions are alternated in the reactor. Currently there are two variations of the DRIE. The first variation consists of three distinct steps (the Bosch Process as used in the UNAXIS tool) while the second variation only consists of two steps (ASE used in the STS tool). In the 1st Variation, the etch cycle is as follows: (i) SF6 isotropic etch; (ii) C4F8 passivation; (iii) SF6 anisoptropic etch for floor cleaning. In the 2nd variation, steps (i) and (iii) are combined.
Both variations operate similarly. The C4F8 creates a polymer on the surface of the substrate, and the second gas composition (SF6 and O2) etches the substrate. The polymer is immediately sputtered away by the physical part of the etching, but only on the horizontal surfaces and not the sidewalls. Since the polymer only dissolves very slowly in the chemical part of the etching, it builds up on the sidewalls and protects them from etching. As a result, etching aspect ratios of 50 to 1 can be achieved. The process can easily be used to etch completely through a silicon substrate, and etch rates are 3-4 times higher than wet etching.
Chemical Vapor DepositionEdit
Chemical vapor deposition (CVD) is a chemical process used to produce high-purity, high-performance solid materials. The process is often used in the semiconductor industry to produce thin films. In a typical CVD process, the wafer (substrate) is exposed to one or more volatile precursors, which react and/or decompose on the substrate surface to produce the desired deposit. Frequently, volatile byproducts are also produced, which are removed by gas flow through the reaction chamber.
Physical Vapor DepositionEdit
Physical vapor deposition (PVD) is a general term used to describe any of a variety of methods to deposit thin films by the condensation of a vaporized form of the material onto various surfaces (e.g., onto semiconductor wafers). The coating method involves purely physical processes such as high temperature vacuum evaporation or plasma sputter bombardment rather than a involving a chemical reaction at the surface to be coated as in chemical vapor deposition.
Variants of PVD include, in order of increasing novelty:
- Evaporative deposition -- In which the material to be deposited is heated to a high vapor pressure by electrically resistive heating in "high" vacuum.
- Electron Beam Physical Vapor Deposition -- In which the material to be deposited is heated to a high vapor pressure by electron bombardment in "high" vacuum.
- Sputter deposition -- In which a glow plasma discharge (usually localized around the "target" by a magnet) bombards the material sputtering some away as a vapor.
- Cathodic Arc Deposition - In which a high power arc directed at the target material blasts away some into a vapor.
- Pulsed laser deposition - In which a high power laser ablates material from the target into a vapor.
LOCOS, short for LOCal Oxidation of Silicon, is a microfabrication process where silicon dioxide is formed in selected areas on silicon wafer having the Si-SiO2 interface at a lower point than the rest of the silicon surface.
This technology was developed to insulate MOS transistors from each-other. The main goal is to create an silicon oxide insulating structure that penetrates under the surface of the wafer, so that the Si-SiO2 interface occur at a lower point than the rest of the silicon surface. This cannot be easily achieved by etching field oxide. Thermal oxidation of selected regions surrounding transistors is used instead. The oxigen penetrates in depth of the wafer, reacts with silicon and transforms it in to silicon oxide. In this way, an immersed structure is formed.
The immersed insulating barrier limits the transistor cross-talk.
Typical process steps are the following:
- Preparation of silicon substrate (layer 1)
- CVD deposition of SiO2, pad/buffer oxide (layer 2)
- CVD deposition of Si3N4, nitride mask (layer 3)
- Etching of nitride layer (layer 3) and silicon oxide layer (layer 2)
- Thermal growth of silicon oxide (structure 4)
- Furhter growth of thermal silicon oxide (structure 4)
- Removal of nitride mask (layer 3)
There are 4 basic layers/structures:
- Si, silicon substrate, wafer
- SiO2, buffer oxide (pad oxide), chemical vapor deposition silicon oxide
- Si3N4, nitride mask
- SiO2, insulation oxide, thermal oxide