Computer Architecture Lab/WS2008


Gruppe 0 edit

Matthias Feurstein

IS1 edit

Vergleich der Instruktionssets von:

  1. Z80
  2. Atmel AVR
  3. ARM7TDMI

Vergleich:


Gruppe 1 edit

Julian Grahsl

Raffael Trimmal

Miodrag Pejic

Robert Najvirt

Vergleich der Instruktionssets von:

AVR 8-Bit

http://www.atmel.com/dyn/resources/prod_documents/doc0856.pdf

68000

http://www.freescale.com/files/archives/doc/ref_manual/M68000PRM.pdf
http://www.freescale.com/files/32bit/doc/ref_manual/MC68000UM.pdf

8080

Zu finden: Hier

Sweet 16 (Gruppe 2) edit

Franz-Josef Katzdobler, Daniel Reichhard, Stefan Resch, Matthias Wenzl

Instruction Set I edit

The discussion and the comparison of the instruction sets from

can be found here.

Documentation

Gruppe 3 edit

Christian Pfeifhofer, Michael Wessner, Michael Zoech

Instruction Set 1 edit

Comparison of the instruction sets of:

  1. PICMicro PIC16Cxxx
  2. DEC Alpha
  3. Intel 4004

Instruction Set 2 edit

The instruction set of our processor:

Processor Documentation edit

The documentation of our processor is available in pdf format:

AUA (Another Useless Architecture) edit

  • Rottensteiner Stefan
  • Tauner Stefan
  • Wilhelm Jakob

Instruction Set Comparison edit

  • AVR32
  • Intel i960
  • SuperH

Our own CPU edit

A quite standard 16bit RISC implementation with 32 registers and probably a 4 stage pipeline (ex and mem combined).

AUA

Gruppe 5 (Project: MaQuelle) edit

Instruction Set I edit

  • Infineon TriCore
  • Freescale MPC7448 (PowerPC)
  • Motorola 68000

Comparison: