Computer Architecture Lab/Projects
This page lists project ideas for the CA architecture lab. However, these projects are not limited to CA lab, but can also be a starting point for a Bachelor or Masters thesis.
Project List
editMost of the following projects are in the context of Patmos and Argo on the T-CREST platform. Advanced projects can lead to a research publication at a workshop.
- Roll your own microprocessor
- Add performance counter to Patmos and look into hybrid measurement and static WCET analysis
- Neural network accelerator connected to Patmos
- DDR controller for the DE2-115 - start with Edgar's work, port it to Chisel, and adapt for DE2-115
- A 'normal' NoC with shared address transactions, but still using TDM. With either only write, or read and write
- SD card connector, including same software to read and write files
- Time-triggered Ethernet
- VGA connector for a display
- Network-on-chip in Chisel
- Argo NoC in Chisel
- Hardware support for locking (CAS or LL/SC)
- Transactional memory (real-time)
- A normal NoC with standard wormhole routing
- Integrate the Berkeley hardfloat into Patmos and compare <https://github.com/ucb-bar/berkeley-hardfloat/blob/master/README.md>
- On shared SPMs - maybe change of ownership - there was a paper idea on this
- Cache with hit in hardware and miss in SW with a trap handler
- 2nd level cache
- Multicore processor with shared L2 cache and cache coherence to L1
- 2nd level SPM
- Trace port for Patmos (performance counters, including cache misses, memory,...)
- Debugging support for Patmos (gdb)
- Round robin arbiter with rate control (for mixed real-time systems)
- Floating point unit for Patmos
- Read in Argo (Pull)
- Real-time TCP/IP stack with WCET analysis
- SWEET analysis tool integration
- Out-of-order Patmos
- WCET analysis tool for Patmos
- uCLinux port to Patmos
- ArrayCache with JOP